commit 9c489ea6bed134fecfd556b439c68bba48fbe102
author Lluís Vilanova <vilanova@ac.upc.edu> Fri Jul 14 11:17:35 2017 +0300
committer Richard Henderson <rth@twiddle.net> Wed Jul 19 14:45:16 2017 -0700
tree 3d54a182709bc45c16e276cc33e36f01cbe7f4ee
parent 797ed66d29909e9564b146a4a181005fc8096c69

tcg: Pass generic CPUState to gen_intermediate_code()

Needed to implement a target-agnostic gen_intermediate_code()
in the future.

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Benneé <alex.benee@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Message-Id: <150002025498.22386.18051908483085660588.stgit@frigg.lan>
Signed-off-by: Richard Henderson <rth@twiddle.net>

target/sh4/translate.c

diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 498bb99..1019107 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -2230,10 +2230,9 @@
 }
 #endif
 
-void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb)
+void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb)
 {
-    SuperHCPU *cpu = sh_env_get_cpu(env);
-    CPUState *cs = CPU(cpu);
+    CPUSH4State *env = cs->env_ptr;
     DisasContext ctx;
     target_ulong pc_start;
     int num_insns;