tree 04cf73d4107a855c699624eca5cc2c85a36aa8e0
parent 7175a562f157d39725ab396e39c1e8e410d206b3
author Sebastian Huber <sebastian.huber@embedded-brains.de> 1718724141 +0100
committer Peter Maydell <peter.maydell@linaro.org> 1718974918 +0100

hw/arm/xilinx_zynq: Fix IRQ/FIQ routing

Fix the system bus interrupt line to CPU core assignment.

Fixes: ddcf58e044ce0 ("hw/arm/xilinx_zynq: Support up to two CPU cores")
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240610052906.4432-1-sebastian.huber@embedded-brains.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>