)]}'
{
  "commit": "98db7a585eb402579d2e5a7ec2b04fa22d12490a",
  "tree": "7ef67027c576ee5916da2437a6808b03896cd734",
  "parents": [
    "9e51e0cd4bac9dd94f593d66497f635edd871d2e"
  ],
  "author": {
    "name": "Siarhei Volkau",
    "email": "lis8215@gmail.com",
    "time": "Thu Jun 08 13:42:05 2023 +0300"
  },
  "committer": {
    "name": "Philippe Mathieu-Daudé",
    "email": "philmd@linaro.org",
    "time": "Mon Jul 10 23:33:38 2023 +0200"
  },
  "message": "target/mips/mxu: Add D32ACC D32ACCM D32ASUM instructions\n\nThese instructions are all dual 32-bit addition/subtraction in\nvarious combinations. The instructions are grouped in pool12,\nsee the opcode organization in the file.\n\nSigned-off-by: Siarhei Volkau \u003clis8215@gmail.com\u003e\nMessage-Id: \u003c20230608104222.1520143-17-lis8215@gmail.com\u003e\nSigned-off-by: Philippe Mathieu-Daudé \u003cphilmd@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b133f9f11d5bc46cd19d043b69efc713523b7ecc",
      "old_mode": 33188,
      "old_path": "target/mips/tcg/mxu_translate.c",
      "new_id": "82a07040c613db4fbb11f81f9b9ca29bebe916a6",
      "new_mode": 33188,
      "new_path": "target/mips/tcg/mxu_translate.c"
    }
  ]
}