commit 9893c80d81587ac25d8ea4a82651371b54e7df35
author Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tue Feb 12 11:29:31 2013 +1000
committer Anthony Liguori <aliguori@us.ibm.com> Wed Feb 13 11:57:58 2013 -0600
tree 7b7bb20a76dd7ebc7ed5fe80bd742a120d2b0774
parent 8a8f5840082eb65d140ccfe7b128c92390cce1c3

cadance_uart: Accept input after rx FIFO pop

The device returns false from the can receive function when the FIFO is
full. This means the device should check for buffered input whenever a byte is
popped from the FIFO.

Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1360632571-25638-1-git-send-email-peter.crosthwaite@xilinx.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

hw/cadence_uart.c

diff --git a/hw/cadence_uart.c b/hw/cadence_uart.c
index cf2f53c..5766d38 100644
--- a/hw/cadence_uart.c
+++ b/hw/cadence_uart.c
@@ -343,6 +343,7 @@
         if (!s->rx_count) {
             s->r[R_SR] |= UART_SR_INTR_REMPTY;
         }
+        qemu_chr_accept_input(s->chr);
     } else {
         *c = 0;
         s->r[R_SR] |= UART_SR_INTR_REMPTY;