commit 97fb318d37be4d21125e89c96e4e92ea33beac51
author Peter Maydell <peter.maydell@linaro.org> Fri May 24 13:48:29 2019 +0100
committer Peter Maydell <peter.maydell@linaro.org> Thu Jun 13 15:14:03 2019 +0100
tree 68e4701de052865806211c25c3cc2a443e39aaae
parent fc1120a7f5f2d4b601003205c598077d3eb11ad2

hw/arm/smmuv3: Fix decoding of ID register range

The SMMUv3 ID registers cover an area 0x30 bytes in size
(12 registers, 4 bytes each). We were incorrectly decoding
only the first 0x20 bytes.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20190524124829.2589-1-peter.maydell@linaro.org

hw/arm/smmuv3.c

diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index fd8ec78..e96d5be 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1232,7 +1232,7 @@
                               uint64_t *data, MemTxAttrs attrs)
 {
     switch (offset) {
-    case A_IDREGS ... A_IDREGS + 0x1f:
+    case A_IDREGS ... A_IDREGS + 0x2f:
         *data = smmuv3_idreg(offset - A_IDREGS);
         return MEMTX_OK;
     case A_IDR0 ... A_IDR5: