microblaze: Make the MSR PVR bit non writable
Instead of hardcoding it to 1.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 1a862d3..15f1fe5 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -424,10 +424,15 @@
static inline void msr_write(DisasContext *dc, TCGv v)
{
+ TCGv t;
+
+ t = tcg_temp_new();
dc->cpustate_changed = 1;
- tcg_gen_mov_tl(cpu_SR[SR_MSR], v);
- /* PVR, we have a processor version register. */
- tcg_gen_ori_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], (1 << 10));
+ /* PVR bit is not writable. */
+ tcg_gen_andi_tl(t, v, ~(1 << 10));
+ tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], (1 << 10));
+ tcg_gen_or_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], v);
+ tcg_temp_free(t);
}
static void dec_msr(DisasContext *dc)
