tree 0e2f6c1cadccbb62d061fd88c1c0313a0cbb454a
parent 28b58f19d269633b3d14b6aebf1e92b3cd3ab56e
author Stafford Horne <shorne@gmail.com> 1578691723 +0900
committer Richard Henderson <richard.henderson@linaro.org> 1579222243 -1000

target/openrisc: Fix FPCSR mask to allow setting DZF

The mask used when setting FPCSR allows setting bits 10 to 1.  However,
OpenRISC has flags and config bits in 11 to 1, 11 being Divide by Zero
Flag (DZF).  This seems like an off-by-one bug.

This was found when testing the GLIBC test suite which has test cases to
set and clear all bits.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Message-Id: <20200110212843.27335-1-shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>