commit 9617efe8e78fe977c8ddbb18d7b14b532ab07c3e
author ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Tue May 08 21:05:55 2007 +0000
committer ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Tue May 08 21:05:55 2007 +0000
tree 1e02c79c07cb25fd03285f4e15dcebe2e928d3dd
parent e14a693ddaec910888ba2870aab35b5eb8793e5d

Another bunch of mips host support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2788 c046a42c-6fe2-441c-8c8c-71466251a162

Makefile.target

diff --git a/Makefile.target b/Makefile.target
index 9bb12c2..aa99f39 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -181,7 +181,7 @@
 endif
 
 ifeq ($(ARCH),mips)
-OP_CFLAGS+=-G 0 -fomit-frame-pointer -fno-delayed-branch
+OP_CFLAGS+=-mabi=32 -G0 -fno-PIC -mno-abicalls -fomit-frame-pointer -fno-delayed-branch -Wa,-O0
 ifeq ($(WORDS_BIGENDIAN),yes)
 BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
 else
@@ -190,7 +190,7 @@
 endif
 
 ifeq ($(ARCH),mips64)
-OP_CFLAGS+=-G 0 -fomit-frame-pointer -fno-delayed-branch
+OP_CFLAGS+=-mabi=n32 -G0 -fno-PIC -mno-abicalls -fomit-frame-pointer -fno-delayed-branch -Wa,-O0
 ifeq ($(WORDS_BIGENDIAN),yes)
 BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
 else

cpu-exec.c

diff --git a/cpu-exec.c b/cpu-exec.c
index cd74412..fedabef 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -1545,9 +1545,10 @@
 
 #elif defined(__mips__)
 
-int cpu_signal_handler(int host_signum, struct siginfo *info, 
+int cpu_signal_handler(int host_signum, void *pinfo, 
                        void *puc)
 {
+    siginfo_t *info = pinfo;
     struct ucontext *uc = puc;
     greg_t pc = uc->uc_mcontext.pc;
     int is_write;

dyngen.c

diff --git a/dyngen.c b/dyngen.c
index dd46ea0..b8950b1 100644
--- a/dyngen.c
+++ b/dyngen.c
@@ -124,6 +124,14 @@
 #define elf_check_arch(x) ((x) == EM_MIPS)
 #define ELF_USES_RELOC
 
+#elif defined(HOST_MIPS64)
+
+/* Assume n32 ABI here, which is ELF32. */
+#define ELF_CLASS	ELFCLASS32
+#define ELF_ARCH	EM_MIPS
+#define elf_check_arch(x) ((x) == EM_MIPS)
+#define ELF_USES_RELOCA
+
 #else
 #error unsupported CPU - please update the code
 #endif
@@ -1648,7 +1656,7 @@
             error("rts expected at the end of %s", name);
         copy_size = p - p_start;
     }
-#elif defined(HOST_MIPS)
+#elif defined(HOST_MIPS) || defined(HOST_MIPS64)
     {
 #define INSN_RETURN     0x03e00008
 #define INSN_NOP        0x00000000
@@ -2510,7 +2518,7 @@
                 }
                 }
             }
-#elif defined(HOST_MIPS)
+#elif defined(HOST_MIPS) || defined(HOST_MIPS64)
             {
                 for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) {
 		    if (rel->r_offset >= start_offset && rel->r_offset < start_offset + copy_size) {
@@ -2528,6 +2536,16 @@
                         addend = get32((uint32_t *)(text + rel->r_offset));
                         reloc_offset = rel->r_offset - start_offset;
 			switch (type) {
+			case R_MIPS_26:
+                            fprintf(outfile, "    /* R_MIPS_26 RELOC, offset 0x%x, name %s */\n",
+				    rel->r_offset, sym_name);
+                            fprintf(outfile,
+				    "    *(uint32_t *)(gen_code_ptr + 0x%x) = "
+				    "(0x%x & ~0x3fffff) "
+				    "| ((0x%x + ((%s - (*(uint32_t *)(gen_code_ptr + 0x%x))) >> 2)) "
+				    "   & 0x3fffff);\n",
+                                    reloc_offset, addend, addend, name, reloc_offset);
+			    break;
 			case R_MIPS_HI16:
                             fprintf(outfile, "    /* R_MIPS_HI16 RELOC, offset 0x%x, name %s */\n",
 				    rel->r_offset, sym_name);