tree 72e8e960056f5d94f3e1ee5fc0a756be8cb0d2d1
parent efd29e3398001c764fc9f0066ba1589e6ebc1043
author TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> 1726725043 +0800
committer Alistair Francis <alistair.francis@wdc.com> 1730251327 +1000

target/riscv: Correct SXL return value for RV32 in RV64 QEMU

Ensure that riscv_cpu_sxl returns MXL_RV32 when runningRV32 in an
RV64 QEMU.

Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Fixes: 05e6ca5e156 ("target/riscv: Ignore reserved bits in PTE for RV64")
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240919055048.562-4-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>