More consistent naming for CRIS register-number macros.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/gdbstub.c b/gdbstub.c
index f110d1e..3e68e52 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -828,7 +828,7 @@
for (i = 0; i < 16; i++)
ptr += cris_save_32 (ptr, env->regs[i]);
- srs = env->pregs[SR_SRS];
+ srs = env->pregs[PR_SRS];
ptr += cris_save_8 (ptr, env->pregs[0]);
ptr += cris_save_8 (ptr, env->pregs[1]);
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 56b0497..4e92f18 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -239,19 +239,21 @@
#include "cpu-all.h"
-/* Register aliases. */
-#define REG_SP 14
-#define REG_ACR 15
-#define REG_MOF 7
+/* Register aliases. R0 - R15 */
+#define R_FP 8
+#define R_SP 14
+#define R_ACR 15
-/* Support regs. */
-#define SR_PID 2
-#define SR_SRS 3
-#define SR_EBP 9
-#define SR_ERP 10
-#define SR_CCS 13
+/* Support regs, P0 - P15 */
+#define PR_PID 2
+#define PR_SRS 3
+#define PR_MOF 7
+#define PR_EBP 9
+#define PR_ERP 10
+#define PR_SRP 11
+#define PR_CCS 13
-/* Support func regs. */
+/* Support function regs. */
#define SFR_RW_GC_CFG 0][0
#define SFR_RW_MM_CFG 1][0
#define SFR_RW_MM_KBASE_LO 1][1
diff --git a/target-cris/helper.c b/target-cris/helper.c
index d719593..e7eac08 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -82,10 +82,9 @@
{
uint32_t ccs;
/* Apply the ccs shift. */
- ccs = env->pregs[SR_CCS];
+ ccs = env->pregs[PR_CCS];
ccs = (ccs & 0xc0000000) | ((ccs << 12) >> 2);
-// printf ("ccs=%x %x\n", env->pregs[SR_CCS], ccs);
- env->pregs[SR_CCS] = ccs;
+ env->pregs[PR_CCS] = ccs;
}
void do_interrupt(CPUState *env)
@@ -104,11 +103,10 @@
switch (env->exception_index)
{
case EXCP_BREAK:
-// printf ("BREAK! %d\n", env->trapnr);
irqnum = env->trapnr;
- ebp = env->pregs[SR_EBP];
+ ebp = env->pregs[PR_EBP];
isr = ldl_code(ebp + irqnum * 4);
- env->pregs[SR_ERP] = env->pc + 2;
+ env->pregs[PR_ERP] = env->pc + 2;
env->pc = isr;
cris_shift_ccs(env);
@@ -117,9 +115,9 @@
case EXCP_MMU_MISS:
// printf ("MMU miss\n");
irqnum = 4;
- ebp = env->pregs[SR_EBP];
+ ebp = env->pregs[PR_EBP];
isr = ldl_code(ebp + irqnum * 4);
- env->pregs[SR_ERP] = env->pc;
+ env->pregs[PR_ERP] = env->pc;
env->pc = isr;
cris_shift_ccs(env);
break;
@@ -131,15 +129,15 @@
if (env->interrupt_request & CPU_INTERRUPT_HARD) {
if (!env->pending_interrupts)
return;
- if (!(env->pregs[SR_CCS] & I_FLAG)) {
+ if (!(env->pregs[PR_CCS] & I_FLAG)) {
return;
}
irqnum = 31 - clz32(env->pending_interrupts);
irqnum += 0x30;
- ebp = env->pregs[SR_EBP];
+ ebp = env->pregs[PR_EBP];
isr = ldl_code(ebp + irqnum * 4);
- env->pregs[SR_ERP] = env->pc;
+ env->pregs[PR_ERP] = env->pc;
env->pc = isr;
cris_shift_ccs(env);
@@ -161,7 +159,6 @@
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
{
-// printf ("%s\n", __func__);
uint32_t phy = addr;
struct cris_mmu_result_t res;
int miss;
diff --git a/target-cris/mmu.c b/target-cris/mmu.c
index 2be4eb8..5fa5215 100644
--- a/target-cris/mmu.c
+++ b/target-cris/mmu.c
@@ -87,7 +87,7 @@
pid = EXTRACT_FIELD(hi, 0, 7);
if (vpn == vpage
- && pid == env->pregs[SR_PID]) {
+ && pid == env->pregs[PR_PID]) {
match = 1;
break;
}
@@ -104,7 +104,7 @@
printf ("%s match=%d vaddr=%x vpage=%x vpn=%x pfn=%x pid=%x %x\n",
__func__, match,
vaddr, vpage,
- vpn, pfn, pid, env->pregs[SR_PID]);
+ vpn, pfn, pid, env->pregs[PR_PID]);
res->pfn = pfn;
return !match;
}
diff --git a/target-cris/op.c b/target-cris/op.c
index c7243b1..36cfa3f 100644
--- a/target-cris/op.c
+++ b/target-cris/op.c
@@ -185,9 +185,9 @@
uint32_t ccs;
/* Apply the ccs shift. */
- ccs = env->pregs[SR_CCS];
+ ccs = env->pregs[PR_CCS];
ccs = (ccs & 0xc0000000) | ((ccs << 12) >> 2);
- env->pregs[SR_CCS] = ccs;
+ env->pregs[PR_CCS] = ccs;
RETURN();
}
void OPPROTO op_ccs_rshift (void)
@@ -195,21 +195,21 @@
uint32_t ccs;
/* Apply the ccs shift. */
- ccs = env->pregs[SR_CCS];
+ ccs = env->pregs[PR_CCS];
ccs = (ccs & 0xc0000000) | (ccs >> 10);
- env->pregs[SR_CCS] = ccs;
+ env->pregs[PR_CCS] = ccs;
RETURN();
}
void OPPROTO op_setf (void)
{
- env->pregs[SR_CCS] |= PARAM1;
+ env->pregs[PR_CCS] |= PARAM1;
RETURN();
}
void OPPROTO op_clrf (void)
{
- env->pregs[SR_CCS] &= ~PARAM1;
+ env->pregs[PR_CCS] &= ~PARAM1;
RETURN();
}
@@ -254,25 +254,25 @@
}
void OPPROTO op_movl_T0_flags (void)
{
- T0 = env->pregs[SR_CCS];
+ T0 = env->pregs[PR_CCS];
RETURN();
}
void OPPROTO op_movl_flags_T0 (void)
{
- env->pregs[SR_CCS] = T0;
+ env->pregs[PR_CCS] = T0;
RETURN();
}
void OPPROTO op_movl_sreg_T0 (void)
{
- env->sregs[env->pregs[SR_SRS]][PARAM1] = T0;
+ env->sregs[env->pregs[PR_SRS]][PARAM1] = T0;
RETURN();
}
void OPPROTO op_movl_tlb_lo_T0 (void)
{
int srs;
- srs = env->pregs[SR_SRS];
+ srs = env->pregs[PR_SRS];
if (srs == 1 || srs == 2)
{
int set;
@@ -296,7 +296,7 @@
void OPPROTO op_movl_T0_sreg (void)
{
- T0 = env->sregs[env->pregs[SR_SRS]][PARAM1];
+ T0 = env->sregs[env->pregs[PR_SRS]][PARAM1];
RETURN();
}
@@ -356,21 +356,21 @@
int x;
/* Extended arithmetics, leave the z flag alone. */
- env->debug3 = env->pregs[SR_CCS];
+ env->debug3 = env->pregs[PR_CCS];
if (env->cc_x_live)
x = env->cc_x;
else
- x = env->pregs[SR_CCS] & X_FLAG;
+ x = env->pregs[PR_CCS] & X_FLAG;
if ((x || env->cc_op == CC_OP_ADDC)
&& flags & Z_FLAG)
env->cc_mask &= ~Z_FLAG;
/* all insn clear the x-flag except setf or clrf. */
- env->pregs[SR_CCS] &= ~(env->cc_mask | X_FLAG);
+ env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG);
flags &= env->cc_mask;
- env->pregs[SR_CCS] |= flags;
+ env->pregs[PR_CCS] |= flags;
RETURN();
}
@@ -778,30 +778,30 @@
void OPPROTO op_addxl_T0_C (void)
{
- if (env->pregs[SR_CCS] & X_FLAG)
- T0 += !!(env->pregs[SR_CCS] & C_FLAG);
+ if (env->pregs[PR_CCS] & X_FLAG)
+ T0 += !!(env->pregs[PR_CCS] & C_FLAG);
RETURN();
}
void OPPROTO op_subxl_T0_C (void)
{
- if (env->pregs[SR_CCS] & X_FLAG)
- T0 -= !!(env->pregs[SR_CCS] & C_FLAG);
+ if (env->pregs[PR_CCS] & X_FLAG)
+ T0 -= !!(env->pregs[PR_CCS] & C_FLAG);
RETURN();
}
void OPPROTO op_addl_T0_C (void)
{
- T0 += !!(env->pregs[SR_CCS] & C_FLAG);
+ T0 += !!(env->pregs[PR_CCS] & C_FLAG);
RETURN();
}
void OPPROTO op_addl_T0_R (void)
{
- T0 += !!(env->pregs[SR_CCS] & R_FLAG);
+ T0 += !!(env->pregs[PR_CCS] & R_FLAG);
RETURN();
}
void OPPROTO op_clr_R (void)
{
- env->pregs[SR_CCS] &= ~R_FLAG;
+ env->pregs[PR_CCS] &= ~R_FLAG;
RETURN();
}
@@ -880,7 +880,7 @@
tmp = t0 * t1;
T0 = tmp & 0xffffffff;
- env->pregs[REG_MOF] = tmp >> 32;
+ env->pregs[PR_MOF] = tmp >> 32;
RETURN();
}
@@ -892,7 +892,7 @@
tmp = t0 * t1;
T0 = tmp & 0xffffffff;
- env->pregs[REG_MOF] = tmp >> 32;
+ env->pregs[PR_MOF] = tmp >> 32;
RETURN();
}
@@ -1042,7 +1042,7 @@
}
void OPPROTO op_tst_cc_eq (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int z_set;
z_set = !!(flags & Z_FLAG);
@@ -1056,7 +1056,7 @@
}
void OPPROTO op_tst_cc_ne (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int z_set;
z_set = !!(flags & Z_FLAG);
@@ -1069,7 +1069,7 @@
}
void OPPROTO op_tst_cc_cc (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int c_set;
c_set = !!(flags & C_FLAG);
@@ -1077,7 +1077,7 @@
RETURN();
}
void OPPROTO op_tst_cc_cs (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int c_set;
c_set = !!(flags & C_FLAG);
@@ -1086,7 +1086,7 @@
}
void OPPROTO op_tst_cc_vc (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int v_set;
v_set = !!(flags & V_FLAG);
@@ -1094,7 +1094,7 @@
RETURN();
}
void OPPROTO op_tst_cc_vs (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int v_set;
v_set = !!(flags & V_FLAG);
@@ -1102,7 +1102,7 @@
RETURN();
}
void OPPROTO op_tst_cc_pl (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int n_set;
n_set = !!(flags & N_FLAG);
@@ -1115,7 +1115,7 @@
}
void OPPROTO op_tst_cc_mi (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int n_set;
n_set = !!(flags & N_FLAG);
@@ -1128,7 +1128,7 @@
}
void OPPROTO op_tst_cc_ls (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int c_set;
int z_set;
@@ -1138,7 +1138,7 @@
RETURN();
}
void OPPROTO op_tst_cc_hi (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int z_set;
int c_set;
@@ -1150,7 +1150,7 @@
}
void OPPROTO op_tst_cc_ge (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int n_set;
int v_set;
@@ -1166,7 +1166,7 @@
}
void OPPROTO op_tst_cc_lt (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int n_set;
int v_set;
@@ -1177,7 +1177,7 @@
}
void OPPROTO op_tst_cc_gt (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int n_set;
int v_set;
int z_set;
@@ -1191,7 +1191,7 @@
}
void OPPROTO op_tst_cc_le (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int n_set;
int v_set;
int z_set;
@@ -1204,7 +1204,7 @@
}
void OPPROTO op_tst_cc_p (void) {
- uint32_t flags = env->pregs[SR_CCS];
+ uint32_t flags = env->pregs[PR_CCS];
int p_set;
p_set = !!(flags & P_FLAG);
@@ -1224,7 +1224,7 @@
/* this one is used on every alu op, optimize it!. */
void OPPROTO op_goto_if_not_x (void)
{
- if (env->pregs[SR_CCS] & X_FLAG)
+ if (env->pregs[PR_CCS] & X_FLAG)
GOTO_LABEL_PARAM(1);
RETURN();
}
diff --git a/target-cris/translate.c b/target-cris/translate.c
index d8cfda5..4150737 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -882,7 +882,7 @@
/* Fetch register operand, */
gen_movl_T0_reg[dc->op2]();
gen_op_movl_T1_im(imm);
- crisv32_alu_op(dc, CC_OP_ADD, REG_ACR, 4);
+ crisv32_alu_op(dc, CC_OP_ADD, R_ACR, 4);
return 2;
}
static unsigned int dec_addq(DisasContext *dc)
@@ -1293,7 +1293,7 @@
dec_prep_alu_r(dc, dc->op1, dc->op2, 4, 0);
gen_op_lsll_T0_im(dc->zzsize);
gen_op_addl_T0_T1();
- gen_movl_reg_T0[REG_ACR]();
+ gen_movl_reg_T0[R_ACR]();
return 2;
}
@@ -1736,7 +1736,7 @@
cris_cc_mask(dc, 0);
insn_len = dec_prep_alu_m(dc, 1, memsize);
- crisv32_alu_op(dc, CC_OP_ADD, REG_ACR, 4);
+ crisv32_alu_op(dc, CC_OP_ADD, R_ACR, 4);
do_postinc(dc, memsize);
return insn_len;
}
@@ -2352,9 +2352,9 @@
if (!dc->flagx_live
|| (dc->flagx_live &&
!(dc->cc_op == CC_OP_FLAGS && dc->flags_x))) {
- gen_movl_T0_preg[SR_CCS]();
+ gen_movl_T0_preg[PR_CCS]();
gen_op_andl_T0_im(~X_FLAG);
- gen_movl_preg_T0[SR_CCS]();
+ gen_movl_preg_T0[PR_CCS]();
dc->flagx_live = 1;
dc->flags_x = 0;
}
@@ -2453,7 +2453,7 @@
cpu_fprintf(f, "PC=%x CCS=%x btaken=%d btarget=%x\n"
"cc_op=%d cc_src=%d cc_dest=%d cc_result=%x cc_mask=%x\n"
"debug=%x %x %x\n",
- env->pc, env->pregs[SR_CCS], env->btaken, env->btarget,
+ env->pc, env->pregs[PR_CCS], env->btaken, env->btarget,
env->cc_op,
env->cc_src, env->cc_dest, env->cc_result, env->cc_mask,
env->debug1, env->debug2, env->debug3);
@@ -2469,7 +2469,7 @@
if ((i + 1) % 4 == 0)
cpu_fprintf(f, "\n");
}
- srs = env->pregs[SR_SRS];
+ srs = env->pregs[PR_SRS];
cpu_fprintf(f, "\nsupport function regs bank %d:\n", srs);
if (srs < 256) {
for (i = 0; i < 16; i++) {
