)]}'
{
  "commit": "8a60ffe9a8f46ed514656eb4a40d1386c439daf8",
  "tree": "1996024bd522336c13fc8b89f0e95eac9e0032b5",
  "parents": [
    "84249d026bc3878c196ecd3e8558609ba9260eb6"
  ],
  "author": {
    "name": "Gustavo Romero",
    "email": "gustavo.romero@linaro.org",
    "time": "Tue Aug 26 11:21:28 2025 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Sat Aug 30 16:37:22 2025 +0100"
  },
  "message": "target/arm: Implement FEAT_SCTLR2 and enable with -cpu max\n\nAdd FEAT_SCTLR2, which introduces the SCTLR2_EL1, SCTLR2_EL2, and\nSCTLR2_EL3 registers. These registers are extensions of the SCTLR_ELx\nones.\n\nSigned-off-by: Gustavo Romero \u003cgustavo.romero@linaro.org\u003e\nReviewed-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nSigned-off-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nMessage-id: 20250727074202.83141-4-richard.henderson@linaro.org\nMessage-ID: \u003c20250711140828.1714666-4-gustavo.romero@linaro.org\u003e\n[rth: Remove FEAT_MEC code; handle SCR and HCRX enable bits.]\nSigned-off-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "890dc6fee214c2fea0f09688c1877022826f9e50",
      "old_mode": 33188,
      "old_path": "docs/system/arm/emulation.rst",
      "new_id": "66043b0747aa12c7655c1cce6c1192c04916896e",
      "new_mode": 33188,
      "new_path": "docs/system/arm/emulation.rst"
    },
    {
      "type": "modify",
      "old_id": "5876162428af2996f15031c283bc5ded2dcf75a1",
      "old_mode": 33188,
      "old_path": "target/arm/cpu-features.h",
      "new_id": "e372543bf35888cecd59af23b083244537384502",
      "new_mode": 33188,
      "new_path": "target/arm/cpu-features.h"
    },
    {
      "type": "modify",
      "old_id": "e2b2337399cf5c86d74d91aaa89175d7d98d7780",
      "old_mode": 33188,
      "old_path": "target/arm/cpu.c",
      "new_id": "2ab04cb5f7cf3bb93c29e090f6a3279afbfcb7be",
      "new_mode": 33188,
      "new_path": "target/arm/cpu.c"
    },
    {
      "type": "modify",
      "old_id": "dc9b6dce4c92297b2636d0d7c0dce580f1806d5b",
      "old_mode": 33188,
      "old_path": "target/arm/cpu.h",
      "new_id": "08a29802e1339362456a6a5762ea1a8f5f655ea0",
      "new_mode": 33188,
      "new_path": "target/arm/cpu.h"
    },
    {
      "type": "modify",
      "old_id": "0c1299ff841f3792eb8bb0d4d2df911e490655db",
      "old_mode": 33188,
      "old_path": "target/arm/helper.c",
      "new_id": "11ddeabb13267c343dd7ea70df42fd4b4e9a98ed",
      "new_mode": 33188,
      "new_path": "target/arm/helper.c"
    },
    {
      "type": "modify",
      "old_id": "3f86b070447ca37f62a6ed5b9333dbab0c7395df",
      "old_mode": 33188,
      "old_path": "target/arm/internals.h",
      "new_id": "fb72236255139a3244c32568a9784bc6725274d3",
      "new_mode": 33188,
      "new_path": "target/arm/internals.h"
    },
    {
      "type": "modify",
      "old_id": "35cddbafa4c7593d5826fc224c356e8ac171b81e",
      "old_mode": 33188,
      "old_path": "target/arm/tcg/cpu64.c",
      "new_id": "f4efff03a5996380e067a52dc220619742dacca3",
      "new_mode": 33188,
      "new_path": "target/arm/tcg/cpu64.c"
    }
  ]
}