spapr: move the qemu_irq array under the machine
The qemu_irq array is now allocated at the machine level using a sPAPR
IRQ set_irq handler depending on the chosen interrupt mode. The use of
this handler is slightly inefficient today but it will become necessary
when the 'dual' interrupt mode is introduced.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index fd24e91..9e01a5a 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -182,6 +182,7 @@
unsigned long *irq_map;
sPAPRXive *xive;
sPAPRIrq *irq;
+ qemu_irq *qirqs;
bool cmd_line_caps[SPAPR_CAP_NUM];
sPAPRCapabilities def, eff, mig;
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index d03d4d7..283bb50 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -46,6 +46,7 @@
Error **errp);
int (*post_load)(sPAPRMachineState *spapr, int version_id);
void (*reset)(sPAPRMachineState *spapr, Error **errp);
+ void (*set_irq)(void *opaque, int srcno, int val);
} sPAPRIrq;
extern sPAPRIrq spapr_irq_xics;
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 686db51..7668c38 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -131,7 +131,6 @@
/*< public >*/
uint32_t nr_irqs;
uint32_t offset;
- qemu_irq *qirqs;
ICSIRQState *irqs;
XICSFabric *xics;
};
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index c279dc7..ec23253 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -184,7 +184,6 @@
/* IRQs */
uint32_t nr_irqs;
- qemu_irq *qirqs;
unsigned long *lsi_map;
/* PQ bits and LSI assertion bit */
