commit 7fe48483cd90401de2477733ce65037ee0ed0906
author bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Sat Oct 09 18:08:01 2004 +0000
committer bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Sat Oct 09 18:08:01 2004 +0000
tree 8c3fe5c0ffda5348071a085fa82f1b5dffd9f163
parent 8e3a9fd28059821f819295fe9178435990141924

monitor fixes


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/translate.c

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 3185286..69bc8e2 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -824,18 +824,20 @@
     free(env);
 }
 
-void cpu_arm_dump_state(CPUARMState *env, FILE *f, int flags)
+void cpu_dump_state(CPUState *env, FILE *f, 
+                    int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
+                    int flags)
 {
     int i;
 
     for(i=0;i<16;i++) {
-        fprintf(f, "R%02d=%08x", i, env->regs[i]);
+        cpu_fprintf(f, "R%02d=%08x", i, env->regs[i]);
         if ((i % 4) == 3)
-            fprintf(f, "\n");
+            cpu_fprintf(f, "\n");
         else
-            fprintf(f, " ");
+            cpu_fprintf(f, " ");
     }
-    fprintf(f, "PSR=%08x %c%c%c%c\n", 
+    cpu_fprintf(f, "PSR=%08x %c%c%c%c\n", 
             env->cpsr, 
             env->cpsr & (1 << 31) ? 'N' : '-',
             env->cpsr & (1 << 30) ? 'Z' : '-',