)]}'
{
  "commit": "7fcf7575f3d201fc84ae168017ffdfd6c86257a6",
  "tree": "311ff6e2662fefee041539601cc94e6712e26e8f",
  "parents": [
    "6af9d12c88b9720f209912f6e4b01fefe5906d59",
    "393770d7a02135e7468018f52da610712f151ec0"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Apr 02 11:34:49 2024 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Apr 02 11:34:49 2024 +0100"
  },
  "message": "Merge tag \u0027pull-target-arm-20240402\u0027 of https://git.linaro.org/people/pmaydell/qemu-arm into staging\n\ntarget-arm queue:\n * take HSTR traps of cp15 accesses to EL2, not EL1\n * docs: sbsa: update specs, add dt note\n * hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled\n * tests/qtest: Fix STM32L4x5 GPIO test on 32-bit\n * raspi4b: Reduce RAM to 1Gb on 32-bit hosts\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmYL3J8ZHHBldGVyLm1h\n# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lL9D/9ayKF76MKs+oK8+uHTOLPb\n# Mk71K1apgFnkzC7v9xuI76M6SzZpcKslUbieucDhkDLdVuZvlV3eUcwQGbNWu9fx\n# PCkx7RmD54o+nlGxacZx4wGDfgu9j3maCVik048WxNoHb03NPahfHIb/GFRyHgt/\n# TTjeqfAX7GDbHzMiGuaEJi5dLuAP0/imLt7pooJv4JRDX3CMY+tzlclU4ySMBr+S\n# 0fs5oi6kZMayM8iolpSrPDQy/N3jZJpd5pNPPIcsnL5DEJHKodHbD11+Zetb1tQ7\n# Tyw+x+hUb8Yx2WADVBaihYnbvakUVLt7ZzdgDENV534O/1Vmabzt14CBGTwq4faQ\n# 8Hbc4e/ulhsOUlaxCDKTCuCKDW7sub7UelSz7mX6dAwcjvEi/L99dkP1wSpl0W04\n# 3uTQyjDrfCOVNJ/FMYLRp5VkjwUVacbs3u3Tpe2bgRMI+hxnKZjtIMIY09q3l7em\n# JrPOsiiJlVzngcQko1K0cor3p5W43HIhLUlh0RqJL/CsVhXFfHShAJowK31vGnNp\n# ITklT5CWKMmogHTJycQieemhwwKaALgCUBC9TrcD1dTJe/GksYXVg6Fit7IJttBI\n# zsPMM21Namtr1tKsV71xgtpDrkiWZkeFRpo/GrEf50bX1Mx7Dc8D/ons2RS0G2vo\n# S13Dyt6GBtzS9M8rKX2fsQ\u003d\u003d\n# \u003drYVb\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Tue 02 Apr 2024 11:23:27 BST\n# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE\n# gpg:                issuer \"peter.maydell@linaro.org\"\n# gpg: Good signature from \"Peter Maydell \u003cpeter.maydell@linaro.org\u003e\" [ultimate]\n# gpg:                 aka \"Peter Maydell \u003cpmaydell@gmail.com\u003e\" [ultimate]\n# gpg:                 aka \"Peter Maydell \u003cpmaydell@chiark.greenend.org.uk\u003e\" [ultimate]\n# gpg:                 aka \"Peter Maydell \u003cpeter@archaic.org.uk\u003e\" [ultimate]\n# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE\n\n* tag \u0027pull-target-arm-20240402\u0027 of https://git.linaro.org/people/pmaydell/qemu-arm:\n  raspi4b: Reduce RAM to 1Gb on 32-bit hosts\n  tests/qtest: Fix STM32L4x5 GPIO test on 32-bit\n  hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled\n  docs: sbsa: update specs, add dt note\n  target/arm: take HSTR traps of cp15 accesses to EL2, not EL1\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\n",
  "tree_diff": []
}