commit 7e598de023e4f3f612be7f16acea2ec5dac010ec
author Matt Craighead <mjcraighead@gmail.com> Thu May 10 12:56:08 2012 +0000
committer Peter Maydell <peter.maydell@linaro.org> Thu May 10 12:56:08 2012 +0000
tree 934b6a0d90555ba3d36ea3f2b2b05044431fa399
parent 9f34841a812dc622f8de98bc6141925c22f0ee93

target-arm: When setting FPSCR.QC, don't clear other FPSCR bits

This patch fixes a bug affecting a variety of Neon instructions, such as
VQADD.

Signed-off-by: Matt Craighead <mjcraighead@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

target-arm/neon_helper.c

diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 1e02d61..e0b9dbf 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -16,7 +16,7 @@
 #define SIGNBIT (uint32_t)0x80000000
 #define SIGNBIT64 ((uint64_t)1 << 63)
 
-#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] = CPSR_Q
+#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q
 
 #define NEON_TYPE1(name, type) \
 typedef struct \