tree 4b243104336d8fe08d013bb5a27f7827c094d10b
parent b7b0b1f13a9d0b77b3dcb7696de420c2e805ca25
author David Gibson <david@gibson.dropbear.id.au> 1487548488 +1100
committer David Gibson <david@gibson.dropbear.id.au> 1488327819 +1100

target/ppc: SDR1 is a hypervisor resource

At present the SDR1 register - the base of the system's hashed page table
(HPT) - is represented as an SPR with supervisor read and write permission.
However, on CPUs which have a hypervisor mode, the SDR1 is a hypervisor
only resource.  Change the permission checking on the SPR to reflect this.

Now that this is done, we don't need to check for an external HPT executing
mtsdr1: an external HPT only applies when we're emulating the behaviour of
a hypervisor, rather than modelling the CPU's hypervisor mode internally,
so if we're permitted to execute mtsdr1, we don't have an external HPT.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>