commit 78be258c0eeba3d5613c37888889e84f2ba9bd94
author Paolo Bonzini <pbonzini@redhat.com> Wed Jul 03 13:42:49 2024 +0200
committer Paolo Bonzini <pbonzini@redhat.com> Thu Nov 07 16:54:01 2024 +0100
tree 6ead0b7f082469df799467024026022ee7964481
parent a1dacb66915eb7d08a0596cc97068a37c39930d3

target/i386: add sha512, sm3, sm4 feature bits

SHA512, SM3, SM4 (CPUID[EAX=7,ECX=1).EAX bits 0 to 2) is supported by
Clearwater Forest processor, add it to QEMU as it does not need any
specific enablement.

See https://lore.kernel.org/kvm/20241105054825.870939-1-tao1.su@linux.intel.com/
for reference.

Reviewed-by: Tao Su <tao1.su@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

target/i386/cpu.c

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 58c96ea..3725dbb 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1116,7 +1116,7 @@
     [FEAT_7_1_EAX] = {
         .type = CPUID_FEATURE_WORD,
         .feat_names = {
-            NULL, NULL, NULL, NULL,
+            "sha512", "sm3", "sm4", NULL,
             "avx-vnni", "avx512-bf16", NULL, "cmpccxadd",
             NULL, NULL, "fzrm", "fsrs",
             "fsrc", NULL, NULL, NULL,