commit 72f1c62f7dc24546abafe873d0aeaa2a545c0033
author balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> Sun Apr 13 01:53:27 2008 +0000
committer balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> Sun Apr 13 01:53:27 2008 +0000
tree 01c7e25dd6d3501cce9560b98e3e1be2764a7f78
parent 6c95676b16dcabd69ad9a57c0a9ec4878d3d0e3d

Fix ARM and Thumb ldlex/stlex.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4202 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/translate.c

diff --git a/target-arm/translate.c b/target-arm/translate.c
index f1695de..3d5142a 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6241,6 +6241,7 @@
                     if (insn & (1 << 23)) {
                         /* load/store exclusive */
                         gen_movl_T1_reg(s, rn);
+                        addr = cpu_T[1];
                         if (insn & (1 << 20)) {
                             gen_helper_mark_exclusive(cpu_env, cpu_T[1]);
                             tmp = gen_ld32(addr, IS_USER(s));
@@ -6991,6 +6992,7 @@
             } else if ((insn & (1 << 23)) == 0) {
                 /* Load/store exclusive word.  */
                 gen_movl_T1_reg(s, rn);
+                addr = cpu_T[1];
                 if (insn & (1 << 20)) {
                     gen_helper_mark_exclusive(cpu_env, cpu_T[1]);
                     tmp = gen_ld32(addr, IS_USER(s));