commit 6b814719b4ef3d69c61ec0c1d580006110b04b04
author Max Filippov <jcmvbkbc@gmail.com> Tue Oct 25 18:24:09 2011 +0400
committer Max Filippov <jcmvbkbc@gmail.com> Wed Nov 02 05:05:52 2011 +0400
tree d1af8ed95427686fa25d4939323adc734269c641
parent 0c852e171b3b6073f5b05b66d8df94eda23f6dee

target-xtensa: raise an exception for invalid and reserved opcodes

This includes opcodes from disabled features and those marked reserved in the ISA.
Also end TB on opcodes that definitely generate an exception: illegal
instructions, syscall and privileged instructions.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

target-xtensa/translate.c

diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index b724d46..c81450d 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -266,6 +266,10 @@
     gen_helper_exception_cause(tpc, tcause);
     tcg_temp_free(tpc);
     tcg_temp_free(tcause);
+    if (cause == ILLEGAL_INSTRUCTION_CAUSE ||
+            cause == SYSCALL_CAUSE) {
+        dc->is_jmp = DISAS_UPDATE;
+    }
 }
 
 static void gen_exception_cause_vaddr(DisasContext *dc, uint32_t cause,
@@ -283,6 +287,7 @@
 {
     if (dc->cring) {
         gen_exception_cause(dc, PRIVILEGED_CAUSE);
+        dc->is_jmp = DISAS_UPDATE;
     }
 }
 
@@ -2378,7 +2383,7 @@
 
 invalid_opcode:
     qemu_log("INVALID(pc = %08x)\n", dc->pc);
-    dc->pc = dc->next_pc;
+    gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
 #undef HAS_OPTION
 }