commit 6b4bbd6aeb8e187c0e3be58c8f77a484f82e6f87
author Stafford Horne <shorne@gmail.com> Tue Aug 22 06:37:10 2017 +0900
committer Stafford Horne <shorne@gmail.com> Sat Oct 21 06:35:47 2017 +0900
tree 9f45d3d741dcb0971bf4be0add6250d9deb0a92d
parent 8c949951ed257567303c3d3b83bcd876b53d79e5

openrisc/cputimer: Perparation for Multicore

In order to support multicore system we move some of the previously
static state variables into the state of each core.

On the other hand in order to allow timers to be synced between each
code the ttcr (tick timer count register) is moved out of the core.
This is not as per real hardware spec which has a separate timer counter
per core, but it seems the most simple way to keep each clock in sync.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>

target/openrisc/sys_helper.c

diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index dc6e5cc..9fb7d86 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -189,7 +189,7 @@
         break;
 
     case TO_SPR(10, 1): /* TTCR */
-        env->ttcr = rb;
+        cpu_openrisc_count_set(cpu, rb);
         if (env->ttmr & TIMER_NONE) {
             return;
         }
@@ -312,7 +312,7 @@
 
     case TO_SPR(10, 1): /* TTCR */
         cpu_openrisc_count_update(cpu);
-        return env->ttcr;
+        return cpu_openrisc_count_get(cpu);
 
     default:
         break;