)]}'
{
  "commit": "688a3dae7828ca5ee6f45d510eed083420d72d8a",
  "tree": "5d0eaadaa2d119e3621fa4a4a1baa2d70c0966e1",
  "parents": [
    "4975b64efb5aa4248cbc3760312bbe08d6e71638"
  ],
  "author": {
    "name": "Kane-Chen-AS",
    "email": "kane_chen@aspeedtech.com",
    "time": "Tue Aug 12 17:39:58 2025 +0800"
  },
  "committer": {
    "name": "Cédric Le Goater",
    "email": "clg@redhat.com",
    "time": "Mon Sep 29 18:00:20 2025 +0200"
  },
  "message": "hw/nvram/aspeed_otp: Add ASPEED OTP memory device model\n\nIntroduce a QEMU device model for ASPEED\u0027s One-Time Programmable (OTP)\nmemory.\n\nThis model simulates a word-addressable OTP region used for secure\nfuse storage. The OTP memory can operate with an internal memory\nbuffer.\n\nThe OTP model provides a memory-like interface through a dedicated\nAddressSpace, allowing other device models (e.g., SBC) to issue\ntransactions as if accessing a memory-mapped region.\n\nSigned-off-by: Kane-Chen-AS \u003ckane_chen@aspeedtech.com\u003e\nReviewed-by: Cédric Le Goater \u003cclg@redhat.com\u003e\nLink: https://lore.kernel.org/qemu-devel/20250812094011.2617526-2-kane_chen@aspeedtech.com\nSigned-off-by: Cédric Le Goater \u003cclg@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "add",
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      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "e5b7ca96767c8c348c286ec8a7ab137adeea0cc2",
      "new_mode": 33188,
      "new_path": "hw/nvram/aspeed_otp.c"
    },
    {
      "type": "modify",
      "old_id": "10f3639db6aeaa92fea8db055dd62ae0f74977d2",
      "old_mode": 33188,
      "old_path": "hw/nvram/meson.build",
      "new_id": "b66f23605b772c9b63503bcbc20ad6f29a7fd193",
      "new_mode": 33188,
      "new_path": "hw/nvram/meson.build"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "3752353860796a4e2169af0753b9dd2547e3b82a",
      "new_mode": 33188,
      "new_path": "include/hw/nvram/aspeed_otp.h"
    }
  ]
}