tree eb11fc0be31e6f07b8dce5e8ce3994fd818e954d
parent 68d001928b151a0c50f367c0bdca645b3d5e9ed3
author 陳韋任 (Wei-Ren Chen) <chenwj@iis.sinica.edu.tw> 1352861395 +0800
committer Aurelien Jarno <aurelien@aurel32.net> 1352987296 +0100

target-mips: fix wrong microMIPS opcode encoding

While reading microMIPS decoding, I found a possible wrong opcode
encoding. According to [1] page 166, the bits 13..12 for MULTU is
0x01 rather than 0x00. Please review, thanks.

[1] MIPS Architecture for Programmers VolumeIV-e: The MIPS DSP
    Application-Specific Extension to the microMIPS32 Architecture

Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>