tree bf6af35a149c9bef8262b6c09cb8dd2a934f65b2
parent 346fe0c4c0b88f11a3d0c01c34d9a170d73429cc
author Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> 1344568571 +1000
committer Edgar E. Iglesias <edgar.iglesias@gmail.com> 1344849641 +0200

xilinx_axi*: Re-implemented interconnect

Re-implemented the interconnect between the Xilinx AXI ethernet and DMA
controllers. A QOM interface "stream" is created, for the two stream interfaces.

As per Edgars request, this is designed to be more generic than AXI-stream,
so in the future we may see more clients of this interface beyond AXI stream.

This is based primarily on Paolos original refactoring of the interconnect.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>