)]}'
{
  "commit": "637dc49a3ae6b72cdb6415dcdcdb22ff770f2c8d",
  "tree": "a7a6d33481c9ad77950fed8b949951249dd82350",
  "parents": [
    "27d6a0ec0beec45c35a70cd5f12c4530725dda2a"
  ],
  "author": {
    "name": "Sairaj Kodilkar",
    "email": "sarunkod@amd.com",
    "time": "Mon Nov 03 20:32:09 2025 +0000"
  },
  "committer": {
    "name": "Michael S. Tsirkin",
    "email": "mst@redhat.com",
    "time": "Sun Nov 09 03:25:43 2025 -0500"
  },
  "message": "amd_iommu: Support 64-bit address for IOTLB lookup\n\nThe physical AMD IOMMU supports up to 64 bits of IOVA. When a device tries\nto read or write from a given DMA address, the IOMMU translates the address\nusing the I/O page tables assigned to that device. Since the emulated IOMMU\nuses per-device page tables, an ideal cache tag would need to be 68 bits\n(64-bit address - 12-bit page alignment + 16-bit device ID).\n\nThe current software IOTLB implementation uses a GLib hash table with a\n64-bit key to hash both the IOVA and device ID, which limits the IOVA to 60\nbits. This causes a failure while setting up the device when a guest is\nbooted with \"iommu.forcedac\u003d1\", which forces the use of DMA addresses at the\ntop of the 64-bit address space.\n\nTo address this issue, construct the 64-bit hash key using the upper 52 bits\nof IOVA (GFN) and lower 12 bits of the device ID to avoid truncation as much\nas possible (reducing hash collisions).\n\nFixes: d29a09ca6842 (\"hw/i386: Introduce AMD IOMMU\")\nSigned-off-by: Sairaj Kodilkar \u003csarunkod@amd.com\u003e\nReviewed-by: Vasant Hegde \u003cvasant.hegde@amd.com\u003e\nReviewed-by: Alejandro Jimenez \u003calejandro.j.jimenez@oracle.com\u003e\nTested-by: Alejandro Jimenez \u003calejandro.j.jimenez@oracle.com\u003e\nSigned-off-by: Alejandro Jimenez \u003calejandro.j.jimenez@oracle.com\u003e\nReviewed-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nSigned-off-by: Michael S. Tsirkin \u003cmst@redhat.com\u003e\nMessage-Id: \u003c20251103203209.645434-4-alejandro.j.jimenez@oracle.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5c5cfd498956e1adebb2f99d8313a7012ee6fe45",
      "old_mode": 33188,
      "old_path": "hw/i386/amd_iommu.c",
      "new_id": "d689a06eca469f89dd2e7ee42b40116b3dd75c73",
      "new_mode": 33188,
      "new_path": "hw/i386/amd_iommu.c"
    },
    {
      "type": "modify",
      "old_id": "38471b95d153bdf6a837179a27853ffdf678cc88",
      "old_mode": 33188,
      "old_path": "hw/i386/amd_iommu.h",
      "new_id": "302ccca5121fa1129772addfd8aab6d71f8179ba",
      "new_mode": 33188,
      "new_path": "hw/i386/amd_iommu.h"
    }
  ]
}