Reset ARM cp15.c1_sys to default values. Fix XScale cp15 accesses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3013 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 80727bb..1c748e2 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -83,6 +83,7 @@
uint32_t c0_cachetype;
uint32_t c1_sys; /* System control register. */
uint32_t c1_coproc; /* Coprocessor access register. */
+ uint32_t c1_xscaleauxcr; /* XScale auxiliary control register. */
uint32_t c2_base; /* MMU translation table base. */
uint32_t c2_data; /* MPU data cachable bits. */
uint32_t c2_insn; /* MPU instruction cachable bits. */
