| commit | 5ee4f3c2c750ce55f825116610beb3340daedeca | [log] [tgz] |
|---|---|---|
| author | Richard Henderson <rth@twiddle.net> | Fri Feb 24 09:12:43 2017 +1100 |
| committer | Richard Henderson <rth@twiddle.net> | Tue Feb 28 11:41:46 2017 +1100 |
| tree | f2b2b6ae34634b491cd3b358262418a8fe73fb8e | |
| parent | 8f2d7c341184a95d05476ea3c45dbae2b9ddbe51 [diff] [blame] |
target/alpha: Enable MTTCG by default Alpha has a weak memory ordering and issues all of the required barriers. Signed-off-by: Richard Henderson <rth@twiddle.net>
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index b08d160..691ac00 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h
@@ -28,6 +28,9 @@ #define CPUArchState struct CPUAlphaState +/* Alpha processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #include "exec/cpu-defs.h" #include "fpu/softfloat.h"