)]}'
{
  "commit": "58e801f74e6a4ebd3a0cf3ab1a96e1676b263efd",
  "tree": "8eeb20c0900bce9c1cbcc58c0c69a028e74eb173",
  "parents": [
    "11486349ad9b8858d3f45a540fd48b7a15b2b61d"
  ],
  "author": {
    "name": "Daniel Henrique Barboza",
    "email": "daniel.barboza@oss.qualcomm.com",
    "time": "Mon Jun 29 13:59:54 2026 -0300"
  },
  "committer": {
    "name": "Alistair Francis",
    "email": "alistair.francis@wdc.com",
    "time": "Thu Jul 09 14:58:02 2026 +1000"
  },
  "message": "hw/riscv/riscv-iommu-sys.c: record fault on IOMMU-generated MSI write\n\nThe riscv-iommu spec requires that the IOMMU records its own generated\nMSI write faults.\n\nFixes: 01c1caa9d1 (\"hw/riscv/virt.c, riscv-iommu-sys.c: add MSIx support\")\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3572\nSigned-off-by: Daniel Henrique Barboza \u003cdaniel.barboza@oss.qualcomm.com\u003e\nReviewed-by: Nutty Liu \u003cnutty.liu@hotmail.com\u003e\nMessage-ID: \u003c20260629165954.1018123-1-daniel.barboza@oss.qualcomm.com\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\n",
  "tree_diff": [
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      "old_mode": 33188,
      "old_path": "hw/riscv/riscv-iommu-sys.c",
      "new_id": "3314adeed2312f5565bcb1b33b7cb49bc23fd844",
      "new_mode": 33188,
      "new_path": "hw/riscv/riscv-iommu-sys.c"
    },
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      "new_mode": 33188,
      "new_path": "hw/riscv/riscv-iommu.c"
    },
    {
      "type": "modify",
      "old_id": "a778e86fb7a0027086e8c6c0bbc165b968a0cc2a",
      "old_mode": 33188,
      "old_path": "hw/riscv/riscv-iommu.h",
      "new_id": "da70e8bfa8635b6c6c002289474496f664c48f52",
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}