More MIPS 64-bit FPU support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 85ad333..9a0ffee 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -916,6 +916,59 @@
WT2 = 0x7fffffff;
}
+/* unary operations, MIPS specific, s and d */
+#define FLOAT_UNOP(name) \
+FLOAT_OP(name, d) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FDT2 = float64_ ## name (FDT0, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+} \
+FLOAT_OP(name, s) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FST2 = float32_ ## name (FST0, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+}
+FLOAT_UNOP(rsqrt)
+FLOAT_UNOP(recip)
+#undef FLOAT_UNOP
+
+/* unary operations, MIPS specific, s, d and ps */
+#define FLOAT_UNOP(name) \
+FLOAT_OP(name, d) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FDT2 = float64_ ## name (FDT0, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+} \
+FLOAT_OP(name, s) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FST2 = float32_ ## name (FST0, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+} \
+FLOAT_OP(name, ps) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FST2 = float32_ ## name (FST0, &env->fp_status);*/ \
+/* FSTH2 = float32_ ## name (FSTH0, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+}
+FLOAT_UNOP(rsqrt1)
+FLOAT_UNOP(recip1)
+#undef FLOAT_UNOP
+
/* binary operations */
#define FLOAT_BINOP(name) \
FLOAT_OP(name, d) \
@@ -943,6 +996,37 @@
FLOAT_BINOP(div)
#undef FLOAT_BINOP
+/* binary operations, MIPS specific */
+#define FLOAT_BINOP(name) \
+FLOAT_OP(name, d) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FDT2 = float64_ ## name (FDT0, FDT1, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+} \
+FLOAT_OP(name, s) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FST2 = float32_ ## name (FST0, FST1, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+} \
+FLOAT_OP(name, ps) \
+{ \
+ set_float_exception_flags(0, &env->fp_status); \
+/* XXX: not implemented */ \
+/* FST2 = float32_ ## name (FST0, FST1, &env->fp_status);*/ \
+/* FSTH2 = float32_ ## name (FSTH0, FSTH1, &env->fp_status);*/ \
+do_raise_exception(EXCP_RI); \
+ update_fcr31(); \
+}
+FLOAT_BINOP(rsqrt2)
+FLOAT_BINOP(recip2)
+#undef FLOAT_BINOP
+
FLOAT_OP(addr, ps)
{
set_float_exception_flags(0, &env->fp_status);
@@ -951,6 +1035,14 @@
update_fcr31();
}
+FLOAT_OP(mulr, ps)
+{
+ set_float_exception_flags(0, &env->fp_status);
+ FST2 = float32_mul (FST0, FSTH0, &env->fp_status);
+ FSTH2 = float32_mul (FST1, FSTH1, &env->fp_status);
+ update_fcr31();
+}
+
#define FOP_COND_D(op, cond) \
void do_cmp_d_ ## op (long cc) \
{ \