)]}'
{
  "commit": "543671d9907f7604b83fa9e76cdb04fa9fab9cdc",
  "tree": "969e682bbf6a82ec8904fce6abcce6f961670296",
  "parents": [
    "3ca8af5445b493ae3bc1520c71de3fd7e4555af4"
  ],
  "author": {
    "name": "Philippe Mathieu-Daudé",
    "email": "philmd@linaro.org",
    "time": "Wed Feb 19 16:44:42 2025 +0100"
  },
  "committer": {
    "name": "Philippe Mathieu-Daudé",
    "email": "philmd@linaro.org",
    "time": "Tue Mar 04 14:45:34 2025 +0100"
  },
  "message": "hw/char/sh_serial: Return correct number of empty RX FIFO elements\n\nIn the IOCanReadHandler sh_serial_can_receive(), if the Serial\nControl Register \u0027Receive Enable\u0027 bit is set (bit 4), then we\nreturn a size of (1 \u003c\u003c 4) which happens to be equal to 16, so\neffectively SH_RX_FIFO_LENGTH.\n\nThe IOReadHandler, sh_serial_receive1() takes care to receive\nmultiple chars, but if the FIFO is partly filled, we only process\nthe number of free slots in the FIFO, discarding the other chars!\n\nFix by returning how many elements the FIFO can queue in the\nIOCanReadHandler, so we don\u0027t have to process more than that in\nthe IOReadHandler, thus not discarding anything.\n\nRemove the now unnecessary check on \u0027s-\u003erx_cnt \u003c SH_RX_FIFO_LENGTH\u0027\nin IOReadHandler, reducing the block indentation.\n\nFixes: 63242a007a1 (\"SH4: Serial controller improvement\")\nSigned-off-by: Philippe Mathieu-Daudé \u003cphilmd@linaro.org\u003e\nReviewed-by: Luc Michel \u003cluc.michel@amd.com\u003e\nReviewed-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nMessage-Id: \u003c20250220092903.3726-10-philmd@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "247aeb071ac6ba04a4dab922d9580978a7ce881f",
      "old_mode": 33188,
      "old_path": "hw/char/sh_serial.c",
      "new_id": "41c8175a638f70339d25b738c9db7a1a720296b0",
      "new_mode": 33188,
      "new_path": "hw/char/sh_serial.c"
    }
  ]
}