commit 537730b956572a9e32adfa2e18164e8234594c08
author bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Sun Feb 22 13:40:57 2004 +0000
committer bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> Sun Feb 22 13:40:57 2004 +0000
tree 8ef1237f22efc3c69be70e8e9f3cc0b917704344
parent edf779ffccc836661a7b654d320571a6c220caea

zero offset optimisation


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/translate.c

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 50fe8aa..3efd55e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -279,7 +279,8 @@
         val = insn & 0xfff;
         if (!(insn & (1 << 23)))
             val = -val;
-        gen_op_addl_T1_im(val);
+        if (val != 0)
+            gen_op_addl_T1_im(val);
     } else {
         /* shift/register */
         rm = (insn) & 0xf;
@@ -304,7 +305,8 @@
         val = (insn & 0xf) | ((insn >> 4) & 0xf0);
         if (!(insn & (1 << 23)))
             val = -val;
-        gen_op_addl_T1_im(val);
+        if (val != 0)
+            gen_op_addl_T1_im(val);
     } else {
         /* register */
         rm = (insn) & 0xf;