tree 6d95d2e96f454a9d6cae021b0aa10f6e44d2e373
parent f1572ab94738bd5787b7badcd4bd93a3657f0680
parent b12b72274320ce3ee516d963efd48766163cb240
author Richard Henderson <richard.henderson@linaro.org> 1717608243 -0700
committer Richard Henderson <richard.henderson@linaro.org> 1717608243 -0700
mergetag object b12b72274320ce3ee516d963efd48766163cb240
 type commit
 tag pull-sp-20240605
 tagger Richard Henderson <richard.henderson@linaro.org> 1717603933 -0700
 
 target/sparc: Implement FMAF, IMA, VIS3 and VIS4 extensions
 linux-user: Add ioctl for BLKBSZSET
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Merge tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu into staging

target/sparc: Implement FMAF, IMA, VIS3 and VIS4 extensions
linux-user: Add ioctl for BLKBSZSET

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* tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu: (38 commits)
  target/sparc: Enable VIS4 feature bit
  target/sparc: Implement monitor ASIs
  target/sparc: Implement MWAIT
  target/sparc: Implement SUBXC, SUBXCcc
  target/sparc: Implement FPMIN, FPMAX
  target/sparc: Implement VIS4 comparisons
  target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS
  target/sparc: Implement FALIGNDATAi
  target/sparc: Add feature bit for VIS4
  target/sparc: Implement IMA extension
  target/sparc: Enable VIS3 feature bit
  target/sparc: Implement XMULX
  target/sparc: Implement UMULXHI
  target/sparc: Implement PDISTN
  target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd
  target/sparc: Implement LZCNT
  target/sparc: Implement LDXEFSR
  target/sparc: Implement FSLL, FSRL, FSRA, FSLAS
  target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8
  target/sparc: Implement FPADDS, FPSUBS
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>