commit 534ce69ff05bee2448419f9cad796d6511bc1f9a
author ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Wed Apr 11 02:13:00 2007 +0000
committer ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> Wed Apr 11 02:13:00 2007 +0000
tree 2cdc711dc1e8643b9ab7d29a1dab08412457218c
parent e9df014c0b433ecd9785db4a423e472bc3db386a

More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/op.c

diff --git a/target-mips/op.c b/target-mips/op.c
index 026b08a..9818847 100644
--- a/target-mips/op.c
+++ b/target-mips/op.c
@@ -1293,7 +1293,7 @@
 
 void op_mtc0_context (void)
 {
-    env->CP0_Context = (env->CP0_Context & ~0x007FFFFF) | (T0 & ~0x007FFFFF);
+    env->CP0_Context = (env->CP0_Context & 0x007FFFFF) | (T0 & ~0x007FFFFF);
     RETURN();
 }
 
@@ -1458,12 +1458,6 @@
     RETURN();
 }
 
-void op_mtc0_xcontext (void)
-{
-    env->CP0_XContext = (int32_t)T0; /* XXX */
-    RETURN();
-}
-
 void op_mtc0_framemask (void)
 {
     env->CP0_Framemask = T0; /* XXX */
@@ -1528,6 +1522,7 @@
     RETURN();
 }
 
+#ifdef TARGET_MIPS64
 void op_dmfc0_entrylo0 (void)
 {
     T0 = env->CP0_EntryLo0;
@@ -1612,7 +1607,7 @@
 
 void op_dmtc0_context (void)
 {
-    env->CP0_Context = (env->CP0_Context & ~0x007FFFFF) | (T0 & 0x007FFFF0);
+    env->CP0_Context = (env->CP0_Context & 0x007FFFFF) | (T0 & ~0x007FFFFF);
     RETURN();
 }
 
@@ -1632,7 +1627,7 @@
 
 void op_dmtc0_xcontext (void)
 {
-    env->CP0_XContext = T0; /* XXX */
+    env->CP0_XContext = (env->CP0_XContext & 0xffffffff) | (T0 & ~0xffffffff);
     RETURN();
 }
 
@@ -1647,6 +1642,7 @@
     env->CP0_ErrorEPC = T0;
     RETURN();
 }
+#endif /* TARGET_MIPS64 */
 
 #if 0
 # define DEBUG_FPU_STATE() CALL_FROM_TB1(dump_fpu, env)