commit 526cd4ec01fed36a2a6937fe54eb80d6d7f4c4e4
author Richard Henderson <richard.henderson@linaro.org> Wed Apr 19 15:13:22 2023 +0200
committer Richard Henderson <richard.henderson@linaro.org> Tue May 30 09:51:11 2023 -0700
tree 31e984f6ab8b2408435b9d6406bfe4edbed15331
parent 929124ec0bdbfac11ae27378976e5799ca0d54cc

tcg/ppc: Support 128-bit load/store

Use LQ/STQ with ISA v2.07, and 16-byte atomicity is required.
Note that these instructions do not require 16-byte alignment.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

tcg/ppc/tcg-target-con-str.h

diff --git a/tcg/ppc/tcg-target-con-str.h b/tcg/ppc/tcg-target-con-str.h
index 094613c..2084690 100644
--- a/tcg/ppc/tcg-target-con-str.h
+++ b/tcg/ppc/tcg-target-con-str.h
@@ -9,6 +9,7 @@
  * REGS(letter, register_mask)
  */
 REGS('r', ALL_GENERAL_REGS)
+REGS('o', ALL_GENERAL_REGS & 0xAAAAAAAAu)  /* odd registers */
 REGS('v', ALL_VECTOR_REGS)
 
 /*