target/mips: Remove CPUMIPSState::CP0_SAAR[2] field
Remove the unused CP0_SAAR[2] registers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240209090513.9401-8-philmd@linaro.org>
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index ef1d9f2..5e97b5b 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -749,7 +749,6 @@
int32_t CP0_Count;
uint32_t CP0_SAARI;
#define CP0SAARI_TARGET 0 /* 5..0 */
- uint64_t CP0_SAAR[2];
#define CP0SAAR_BASE 12 /* 43..12 */
#define CP0SAAR_SIZE 1 /* 5..1 */
#define CP0SAAR_EN 0
diff --git a/target/mips/sysemu/machine.c b/target/mips/sysemu/machine.c
index 218f4c3..6d1299a 100644
--- a/target/mips/sysemu/machine.c
+++ b/target/mips/sysemu/machine.c
@@ -282,7 +282,7 @@
VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU),
VMSTATE_INT32(env.CP0_Count, MIPSCPU),
VMSTATE_UINT32(env.CP0_SAARI, MIPSCPU),
- VMSTATE_UINT64_ARRAY(env.CP0_SAAR, MIPSCPU, 2),
+ VMSTATE_UNUSED(2 * sizeof(uint64_t)), /* was CP0_SAAR[2] */
VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU),
VMSTATE_INT32(env.CP0_Compare, MIPSCPU),
VMSTATE_INT32(env.CP0_Status, MIPSCPU),
