commit 508b43eaf3dd179363557bf68e911ddea637e58b
author Richard Henderson <rth@twiddle.net> Fri May 20 13:21:15 2011 -0700
committer Richard Henderson <rth@anchor.twiddle.net> Tue May 31 10:18:05 2011 -0700
tree 7b2c22681c515dc0a57f0179e61f14e11aefa661
parent 8417845ee9dbb2881409bac75365099d17d1cc3d

target-alpha: Merge HW_REI and HW_RET implementations.

Signed-off-by: Richard Henderson <rth@twiddle.net>

target-alpha/translate.c

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 2c0b9c2..2559814 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2876,25 +2876,22 @@
         break;
 #endif
     case 0x1E:
-        /* HW_REI (PALcode) */
+        /* HW_RET (PALcode) */
 #if defined (CONFIG_USER_ONLY)
         goto invalid_opc;
 #else
         if (!ctx->pal_mode)
             goto invalid_opc;
         if (rb == 31) {
-            /* "Old" alpha */
-            gen_helper_hw_rei();
-        } else {
-            TCGv tmp;
-
-            if (ra != 31) {
-                tmp = tcg_temp_new();
-                tcg_gen_addi_i64(tmp, cpu_ir[rb], (((int64_t)insn << 51) >> 51));
-            } else
-                tmp = tcg_const_i64(((int64_t)insn << 51) >> 51);
+            /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return
+               address from EXC_ADDR.  This turns out to be useful for our
+               emulation PALcode, so continue to accept it.  */
+            TCGv tmp = tcg_temp_new();
+            tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUState, ipr[IPR_EXC_ADDR]));
             gen_helper_hw_ret(tmp);
             tcg_temp_free(tmp);
+        } else {
+            gen_helper_hw_ret(cpu_ir[rb]);
         }
         ret = EXIT_PC_UPDATED;
         break;