commit 50788a3fdbade5f8ed1c8296988578133c52c6aa
author Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Thu Oct 06 17:52:04 2016 +0200
committer Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Wed Jan 11 14:37:37 2017 +0100
tree 27648582bc2ac2c55ad0afccce000c968a375f93
parent dedd8c9c32cf753d1868d347b985c36a0a02af9a

target-tricore: Add updfl instruction

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>

target/tricore/fpu_helper.c

diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c
index 9bfed28..7979bb6 100644
--- a/target/tricore/fpu_helper.c
+++ b/target/tricore/fpu_helper.c
@@ -333,3 +333,17 @@
     }
     return result;
 }
+
+void helper_updfl(CPUTriCoreState *env, uint32_t arg)
+{
+    env->FPU_FS =  extract32(arg, 7, 1) & extract32(arg, 15, 1);
+    env->FPU_FI = (extract32(arg, 6, 1) & extract32(arg, 14, 1)) << 31;
+    env->FPU_FV = (extract32(arg, 5, 1) & extract32(arg, 13, 1)) << 31;
+    env->FPU_FZ = (extract32(arg, 4, 1) & extract32(arg, 12, 1)) << 31;
+    env->FPU_FU = (extract32(arg, 3, 1) & extract32(arg, 11, 1)) << 31;
+    /* clear FX and RM */
+    env->PSW &= ~(extract32(arg, 10, 1) << 26);
+    env->PSW |= (extract32(arg, 2, 1) & extract32(arg, 10, 1)) << 26;
+
+    fpu_set_state(env);
+}

target/tricore/helper.h

diff --git a/target/tricore/helper.h b/target/tricore/helper.h
index c897a44..012ac96 100644
--- a/target/tricore/helper.h
+++ b/target/tricore/helper.h
@@ -115,6 +115,7 @@
 DEF_HELPER_2(ftoi, i32, env, i32)
 DEF_HELPER_2(itof, i32, env, i32)
 DEF_HELPER_2(ftouz, i32, env, i32)
+DEF_HELPER_2(updfl, void, env, i32)
 /* dvinit */
 DEF_HELPER_3(dvinit_b_13, i64, env, i32, i32)
 DEF_HELPER_3(dvinit_b_131, i64, env, i32, i32)

target/tricore/translate.c

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 9d1ee66..54249c1 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6735,6 +6735,9 @@
     case OPC2_32_RR_FTOUZ:
         gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
         break;
+    case OPC2_32_RR_UPDFL:
+        gen_helper_updfl(cpu_env, cpu_gpr_d[r1]);
+        break;
     default:
         generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC);
     }