commit 4f6493ff8a73bbb24ad81b080cc256c1c896b7fb
author Aurelien Jarno <aurelien@aurel32.net> Fri Jan 14 20:39:18 2011 +0100
committer Aurelien Jarno <aurelien@aurel32.net> Fri Jan 14 20:39:18 2011 +0100
tree 07bd6488f47f13e7be449b508727e4de05d0b9df
parent fd4bab102c14171f8a5a6b04def6434b75a658a2

target-sh4: fix reset on r2d

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

target-sh4/translate.c

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 69d507d..04bc94a 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -185,30 +185,27 @@
     }
 }
 
-static void cpu_sh4_reset(CPUSH4State * env)
+void cpu_reset(CPUSH4State * env)
 {
     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
         qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
         log_cpu_state(env, 0);
     }
 
-#if defined(CONFIG_USER_ONLY)
-    env->sr = 0;
-#else
-    env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0;
-#endif
-    env->vbr = 0;
+    memset(env, 0, offsetof(CPUSH4State, breakpoints));
+    tlb_flush(env, 1);
+
     env->pc = 0xA0000000;
 #if defined(CONFIG_USER_ONLY)
     env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */
     set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */
 #else
+    env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0;
     env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */
     set_float_rounding_mode(float_round_to_zero, &env->fp_status);
     set_flush_to_zero(1, &env->fp_status);
 #endif
     set_default_nan_mode(1, &env->fp_status);
-    env->mmucr = 0;
 }
 
 typedef struct {
@@ -267,7 +264,7 @@
 	(*cpu_fprintf)(f, "%s\n", sh4_defs[i].name);
 }
 
-static void cpu_sh4_register(CPUSH4State *env, const sh4_def_t *def)
+static void cpu_register(CPUSH4State *env, const sh4_def_t *def)
 {
     env->pvr = def->pvr;
     env->prr = def->prr;
@@ -289,9 +286,8 @@
     env->movcal_backup_tail = &(env->movcal_backup);
     sh4_translate_init();
     env->cpu_model_str = cpu_model;
-    cpu_sh4_reset(env);
-    cpu_sh4_register(env, def);
-    tlb_flush(env, 1);
+    cpu_reset(env);
+    cpu_register(env, def);
     qemu_init_vcpu(env);
     return env;
 }