)]}'
{
  "commit": "4f0fa4bfd98f3ccdcdeed6f43a2340084a6e0a92",
  "tree": "18260f7c95c8045f6a3e0c5f7727c464f702dcd6",
  "parents": [
    "144aac11d6e0600f6dc644ad0d7e47110d8484f1"
  ],
  "author": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Thu Aug 28 15:04:21 2025 +0100"
  },
  "committer": {
    "name": "Peter Maydell",
    "email": "peter.maydell@linaro.org",
    "time": "Tue Sep 16 17:31:54 2025 +0100"
  },
  "message": "target/arm: Drop ARM_FEATURE_XSCALE handling\n\nWe have now removed all the CPU types which had the Intel XScale\nextensions indicated via ARM_FEATURE_XSCALE, so this feature bit\nis never set. Remove all the code that can only be reached when\nusing this flag.\n\nSigned-off-by: Peter Maydell \u003cpeter.maydell@linaro.org\u003e\nReviewed-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nReviewed-by: Philippe Mathieu-Daudé \u003cphilmd@linaro.org\u003e\nMessage-id: 20250828140422.3271703-5-peter.maydell@linaro.org\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d0f6fcdfcea93fc034695c47dd089fb3c1ac75cd",
      "old_mode": 33188,
      "old_path": "target/arm/cpu.c",
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      "new_mode": 33188,
      "new_path": "target/arm/cpu.c"
    },
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      "old_path": "target/arm/cpu.h",
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      "new_mode": 33188,
      "new_path": "target/arm/cpu.h"
    },
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    },
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "target/arm/ptw.c",
      "new_id": "6344971fa6425ef0283bb0fc0da1ed070f5dba1a",
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      "new_path": "target/arm/ptw.c"
    },
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      "type": "modify",
      "old_id": "575e566280ba045b6783cd83b147fd70b2e5869c",
      "old_mode": 33188,
      "old_path": "target/arm/tcg/op_helper.c",
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      "new_path": "target/arm/tcg/op_helper.c"
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  ]
}