commit | 1e0b21d856d7654ea683e743e964c3b292122081 | [log] [tgz] |
---|---|---|
author | Richard Henderson <rth@twiddle.net> | Tue Jul 18 10:02:40 2017 -1000 |
committer | Aurelien Jarno <aurelien@aurel32.net> | Tue Jul 18 23:39:17 2017 +0200 |
tree | 6972a3768b19e981129fdb0cdab2cdbb68419893 | |
parent | 0f73753d621b2dddc87bc3d8889cab8636d41d15 [diff] |
target/sh4: Merge DREG into fpr64 routines Also add a debugging assert that we did signal illegal opc for odd double-precision registers. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-16-rth@twiddle.net> [aurel32: fix whitespace issues] Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>