)]}'
{
  "commit": "487d73fc470d233f2d5da9cec7cd229ae8b88b49",
  "tree": "6389d30dc0179becf9cae1d2194947e39c072dc9",
  "parents": [
    "62c5bc348e39f8b715fb2eac414749ee7e630043"
  ],
  "author": {
    "name": "Daniel Henrique Barboza",
    "email": "dbarboza@ventanamicro.com",
    "time": "Mon Feb 06 11:00:21 2023 -0300"
  },
  "committer": {
    "name": "Palmer Dabbelt",
    "email": "palmer@rivosinc.com",
    "time": "Thu Feb 16 07:55:30 2023 -0800"
  },
  "message": "hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()\n\nThe microchip_icicle_kit, sifive_u, spike and virt boards are now doing\nthe same steps when \u0027-kernel\u0027 is used:\n\n- execute load_kernel()\n- load init_rd()\n- write kernel_cmdline\n\nLet\u0027s fold everything inside riscv_load_kernel() to avoid code\nrepetition. To not change the behavior of boards that aren\u0027t calling\nriscv_load_init(), add an \u0027load_initrd\u0027 flag to riscv_load_kernel() and\nallow these boards to opt out from initrd loading.\n\nCc: Palmer Dabbelt \u003cpalmer@dabbelt.com\u003e\nReviewed-by: Bin Meng \u003cbmeng@tinylab.org\u003e\nReviewed-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\nSigned-off-by: Daniel Henrique Barboza \u003cdbarboza@ventanamicro.com\u003e\nReviewed-by: Philippe Mathieu-Daudé \u003cphilmd@linaro.org\u003e\nMessage-Id: \u003c20230206140022.2748401-3-dbarboza@ventanamicro.com\u003e\nSigned-off-by: Alistair Francis \u003calistair.francis@wdc.com\u003e\nSigned-off-by: Palmer Dabbelt \u003cpalmer@rivosinc.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "df6b4a1fba5127015b5c7b778506523720473169",
      "old_mode": 33188,
      "old_path": "hw/riscv/boot.c",
      "new_id": "4954bb9d4bd5390768bfea7d08d797c8e43ded03",
      "new_mode": 33188,
      "new_path": "hw/riscv/boot.c"
    },
    {
      "type": "modify",
      "old_id": "712625d2a43cbcf28f4a0a366250c467c3ffe95b",
      "old_mode": 33188,
      "old_path": "hw/riscv/microchip_pfsoc.c",
      "new_id": "e81bbd12df47aa0482dc013be9effc7fb3cca882",
      "new_mode": 33188,
      "new_path": "hw/riscv/microchip_pfsoc.c"
    },
    {
      "type": "modify",
      "old_id": "7fe4fb5628ae1bb41a2f11a0ac98ff19864fcaa8",
      "old_mode": 33188,
      "old_path": "hw/riscv/opentitan.c",
      "new_id": "b06944d3825215c2c2448f14fcae3ca5988fcdb1",
      "new_mode": 33188,
      "new_path": "hw/riscv/opentitan.c"
    },
    {
      "type": "modify",
      "old_id": "1a7d381514d143309a179c36bfd6405e09431320",
      "old_mode": 33188,
      "old_path": "hw/riscv/sifive_e.c",
      "new_id": "04939b60c34abd76244ed888af6b34ffecaf5dab",
      "new_mode": 33188,
      "new_path": "hw/riscv/sifive_e.c"
    },
    {
      "type": "modify",
      "old_id": "71be442a5006b118dfc658682358c85aa9e5cb9f",
      "old_mode": 33188,
      "old_path": "hw/riscv/sifive_u.c",
      "new_id": "ad3bb35b3434e36e6a3846c3b6aa2424f8b263bd",
      "new_mode": 33188,
      "new_path": "hw/riscv/sifive_u.c"
    },
    {
      "type": "modify",
      "old_id": "1fa91167ab5db916ccc135d87a108ae20c508341",
      "old_mode": 33188,
      "old_path": "hw/riscv/spike.c",
      "new_id": "a584d5b3a22e47a62fac8469a9d32ac4a3613298",
      "new_mode": 33188,
      "new_path": "hw/riscv/spike.c"
    },
    {
      "type": "modify",
      "old_id": "797c6084b60e7b4920ea6865ae9629a4d64d3894",
      "old_mode": 33188,
      "old_path": "hw/riscv/virt.c",
      "new_id": "86c4adc0c966dd27bf2e75d525bb9179fb219d62",
      "new_mode": 33188,
      "new_path": "hw/riscv/virt.c"
    },
    {
      "type": "modify",
      "old_id": "6295316afb97aaaf896d322344fece3bfc65c065",
      "old_mode": 33188,
      "old_path": "include/hw/riscv/boot.h",
      "new_id": "ea1de8b020286d41f9fd06a0e8e9b1f763f3fd31",
      "new_mode": 33188,
      "new_path": "include/hw/riscv/boot.h"
    }
  ]
}