target/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_secstate()
Pass an ARMSecuritySpace instead of a bool secure to
arm_is_el2_enabled_secstate(). This doesn't change behaviour.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230807141514.19075-8-peter.maydell@linaro.org
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index bcd65a6..02bc8f0 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2504,17 +2504,19 @@
/*
* Return true if the current security state has AArch64 EL2 or AArch32 Hyp.
- * This corresponds to the pseudocode EL2Enabled()
+ * This corresponds to the pseudocode EL2Enabled().
*/
-static inline bool arm_is_el2_enabled_secstate(CPUARMState *env, bool secure)
+static inline bool arm_is_el2_enabled_secstate(CPUARMState *env,
+ ARMSecuritySpace space)
{
+ assert(space != ARMSS_Root);
return arm_feature(env, ARM_FEATURE_EL2)
- && (!secure || (env->cp15.scr_el3 & SCR_EEL2));
+ && (space != ARMSS_Secure || (env->cp15.scr_el3 & SCR_EEL2));
}
static inline bool arm_is_el2_enabled(CPUARMState *env)
{
- return arm_is_el2_enabled_secstate(env, arm_is_secure_below_el3(env));
+ return arm_is_el2_enabled_secstate(env, arm_security_space_below_el3(env));
}
#else
@@ -2538,7 +2540,8 @@
return false;
}
-static inline bool arm_is_el2_enabled_secstate(CPUARMState *env, bool secure)
+static inline bool arm_is_el2_enabled_secstate(CPUARMState *env,
+ ARMSecuritySpace space)
{
return false;
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 9862bc7..8290ca0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5778,7 +5778,7 @@
assert(space != ARMSS_Root);
- if (!arm_is_el2_enabled_secstate(env, arm_space_is_secure(space))) {
+ if (!arm_is_el2_enabled_secstate(env, space)) {
/*
* "This register has no effect if EL2 is not enabled in the
* current Security state". This is ARMv8.4-SecEL2 speak for
