tree ebcace0d1cae8bce096345a036f17496a2848afe
parent b5480a693e3e657108746721ffe434b3bb6e7a72
author Max Chou <max.chou@sifive.com> 1744108775 +0800
committer Alistair Francis <alistair.francis@wdc.com> 1747625946 +1000

target/riscv: rvv: Apply vext_check_input_eew to vector integer extension instructions(OPMVV)

Handle the overlap of source registers with different EEWs.

Co-authored-by: Anton Blanchard <antonb@tenstorrent.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Max Chou <max.chou@sifive.com>
Message-ID: <20250408103938.3623486-8-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Cc: qemu-stable@nongnu.org