commit 405ee3ad573c35790500048d07d5c7ac93167e6a
author balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> Wed Oct 31 00:47:13 2007 +0000
committer balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> Wed Oct 31 00:47:13 2007 +0000
tree f101356976cbca20703a9a6017fdd5de31d377c8
parent 7bfe5777023bb88e8f63a3e80a836f3eb7b13fdc

Invalidate TLBs when domains are changed (Matthew Warton).
Legalise cp15 pid register writes (Matthew Warton).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162

target-arm/helper.c

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4f851ce..d06ee69 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -704,6 +704,7 @@
         break;
     case 3: /* MMU Domain access control / MPU write buffer control.  */
         env->cp15.c3 = val;
+        tlb_flush(env, 1); /* Flush TLB as domain not tracked in TLB */
         break;
     case 4: /* Reserved.  */
         goto bad_reg;
@@ -814,8 +815,6 @@
     case 13: /* Process ID.  */
         switch (op2) {
         case 0:
-            if (!arm_feature(env, ARM_FEATURE_MPU))
-                goto bad_reg;
             /* Unlike real hardware the qemu TLB uses virtual addresses,
                not modified virtual addresses, so this causes a TLB flush.
              */