tree 9b1311c84903e2f84a8052907cfb11aee64e01e3
parent ea8cfdb5d19af45f98abe02844c7963dafec6e92
author Alex Williamson <alex.williamson@redhat.com> 1544643571 -0700
committer Michael S. Tsirkin <mst@redhat.com> 1545256096 -0500

pcie: Fill PCIESlot link fields to support higher speeds and widths

Make use of the PCIESlot speed and width fields to update link
information beyond those configured in pcie_cap_v1_fill().  This is
only called for devices supporting a version 2 capability and
automatically skips any non-PCIESlot devices.  Only devices with
increased link values generate any visible config space differences.

Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>