diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 9fa0ca8..6dff8ef 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -284,10 +284,8 @@
     int CCRes; /* Cycle count resolution/divisor */
     int Status_rw_bitmask; /* Read/write bits in CP0_Status */
 
-#if defined(CONFIG_USER_ONLY)
+#ifdef CONFIG_USER_ONLY
     target_ulong tls_value;
-#else
-    void *irq[8];
 #endif
 
     CPU_COMMON
@@ -298,6 +296,9 @@
     const char *initrd_filename;
 
     mips_def_t *cpu_model;
+#ifndef CONFIG_USER_ONLY
+    void *irq[8];
+#endif
 
     struct QEMUTimer *timer; /* Internal timer */
 };