tree f9fbfc1d70e2d389023f715b7b33f2a56f0f89f7
parent 4fd71d19acd6e05b74927a0b5c4a5b0650e3d6f5
author Richard Henderson <richard.henderson@linaro.org> 1699125697 -0700
committer Richard Henderson <richard.henderson@linaro.org> 1717603510 -0700

target/sparc: Add feature bits for VIS 3

The manual separates VIS 3 and VIS 3B, even though they are both
present in all extant cpus.  For clarity, let the translator
match the manual but otherwise leave them on the same feature bit.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>