)]}'
{
  "commit": "2f93ff3113d60635328fdeaec5d1fece6ceade5a",
  "tree": "68f82d3db635703bff5202898ec5b4d864c3af2c",
  "parents": [
    "e3693cd3c9fe868e6b87d0677ad9740b56937d34"
  ],
  "author": {
    "name": "Richard Henderson",
    "email": "richard.henderson@linaro.org",
    "time": "Fri Jul 05 09:40:25 2024 +0100"
  },
  "committer": {
    "name": "Alex Bennée",
    "email": "alex.bennee@linaro.org",
    "time": "Fri Jul 05 12:34:35 2024 +0100"
  },
  "message": "tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrc\n\nClang 14 generates\n\n/home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for instruction\n    asm(\"mrc p10, 7, r1, cr1, cr0, 0\\n\\t\"\n        ^\n\u003cinline asm\u003e:1:6: note: instantiated into assembly here\n        mrc p10, 7, r1, cr1, cr0, 0\n            ^\n/home/rth/qemu/src/tests/tcg/arm/fcvt.c:432:32: error: invalid operand for instruction\n        \"orr r1, r1, %[flags]\\n\\t\"\n                               ^\n\u003cinline asm\u003e:3:6: note: instantiated into assembly here\n        mcr p10, 7, r1, cr1, cr0, 0\n            ^\n\nThis is perhaps a clang bug, but using the neon mnemonic is clearer.\n\nSigned-off-by: Richard Henderson \u003crichard.henderson@linaro.org\u003e\nReviewed-by: Akihiko Odaki \u003cakihiko.odaki@daynix.com\u003e\nMessage-Id: \u003c20240630190050.160642-14-richard.henderson@linaro.org\u003e\nSigned-off-by: Alex Bennée \u003calex.bennee@linaro.org\u003e\nMessage-Id: \u003c20240705084047.857176-19-alex.bennee@linaro.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d8c61cd29f6bf0171b88ee819dc150d940b0c456",
      "old_mode": 33188,
      "old_path": "tests/tcg/arm/fcvt.c",
      "new_id": "ecebbb0247063e685175d88eea53dcf45f5b057e",
      "new_mode": 33188,
      "new_path": "tests/tcg/arm/fcvt.c"
    }
  ]
}