commit 2bd9543cd303d9f6cbd37b7466bb03543035156b
author Scott Wood <scottwood@freescale.com> Thu Aug 18 10:38:40 2011 +0000
committer Alexander Graf <agraf@suse.de> Thu Oct 06 09:48:04 2011 +0200
tree 614611a0841a7a22949fdafe4a35bdbb407b320b
parent bebabbc7aa7d1c5a45ee325838adf58a19f1b1ee

ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages

This definition is backward compatible with MAV=1.0 as long as
the guest does not set reserved bits in MAS1/MAS4.

Also, fix the shift in booke206_tlb_to_page_size -- it's the base
that should be able to hold a 4G page size, not the shift count.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

target-ppc/cpu.h

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5200e6e..32706df 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -667,8 +667,8 @@
 #define MAS0_ATSEL_TLB     0
 #define MAS0_ATSEL_LRAT    MAS0_ATSEL
 
-#define MAS1_TSIZE_SHIFT   8
-#define MAS1_TSIZE_MASK    (0xf << MAS1_TSIZE_SHIFT)
+#define MAS1_TSIZE_SHIFT   7
+#define MAS1_TSIZE_MASK    (0x1f << MAS1_TSIZE_SHIFT)
 
 #define MAS1_TS_SHIFT      12
 #define MAS1_TS            (1 << MAS1_TS_SHIFT)