omap_gpmc: Support NAND devices
Support accesses to NAND devices, both by mapping them into
the GPMC address space, and via the NAND_COMMAND, NAND_ADDRESS
and NAND_DATA GPMC registers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/hw/omap.h b/hw/omap.h
index 8509c82..2018636 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -122,6 +122,7 @@
target_phys_addr_t base, qemu_irq irq);
void omap_gpmc_reset(struct omap_gpmc_s *s);
void omap_gpmc_attach(struct omap_gpmc_s *s, int cs, MemoryRegion *iomem);
+void omap_gpmc_attach_nand(struct omap_gpmc_s *s, int cs, DeviceState *nand);
/*
* Common IRQ numbers for level 1 interrupt handler
