commit 2a1d9d41aedd722d674b2a94d9b7dbea61469cac
author Richard Henderson <rth@twiddle.net> Wed Nov 16 15:34:03 2016 +0100
committer Richard Henderson <rth@twiddle.net> Tue Jan 10 08:47:48 2017 -0800
tree e1c8d0b929fe013c6cf1c4eeef48f14389813c2f
parent cc0fec8a4d2a8546fe236a09bfd80150af9cbe6b

tcg/mips: Handle clz opcode

Signed-off-by: Richard Henderson <rth@twiddle.net>

tcg/mips/tcg-target.h

diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 06988cf..a680f16 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -121,8 +121,6 @@
 #define TCG_TARGET_HAS_rem_i32          1
 #define TCG_TARGET_HAS_not_i32          1
 #define TCG_TARGET_HAS_nor_i32          1
-#define TCG_TARGET_HAS_clz_i32          0
-#define TCG_TARGET_HAS_ctz_i32          0
 #define TCG_TARGET_HAS_andc_i32         0
 #define TCG_TARGET_HAS_orc_i32          0
 #define TCG_TARGET_HAS_eqv_i32          0
@@ -165,6 +163,8 @@
 #define TCG_TARGET_HAS_ext8s_i32        use_mips32r2_instructions
 #define TCG_TARGET_HAS_ext16s_i32       use_mips32r2_instructions
 #define TCG_TARGET_HAS_rot_i32          use_mips32r2_instructions
+#define TCG_TARGET_HAS_clz_i32          use_mips32r2_instructions
+#define TCG_TARGET_HAS_ctz_i32          0
 
 #if TCG_TARGET_REG_BITS == 64
 #define TCG_TARGET_HAS_movcond_i64      use_movnz_instructions
@@ -177,6 +177,8 @@
 #define TCG_TARGET_HAS_ext8s_i64        use_mips32r2_instructions
 #define TCG_TARGET_HAS_ext16s_i64       use_mips32r2_instructions
 #define TCG_TARGET_HAS_rot_i64          use_mips32r2_instructions
+#define TCG_TARGET_HAS_clz_i64          use_mips32r2_instructions
+#define TCG_TARGET_HAS_ctz_i64          0
 #endif
 
 /* optional instructions automatically implemented */